Your question is Design Test Plan for VLSI Chip. Take a moment with it on the right.
Talk me through your thinking if you like. When you're confident, submit your answer and I'll grade it like a real screen (7/10 or better passes).
How would you design a test plan for verifying a new VLSI chip’s functionality?
Outline a practical, risk-based plan covering specification analysis, verification environments, directed and constrained-random testing, coverage, corner cases, power and performance checks, regression, and sign-off. Explain how you would manage defects, prioritize incomplete coverage, and communicate readiness to design and manufacturing stakeholders.