Your question is Digital Logic Design Questions. Take a moment with it on the right.
Talk me through your thinking if you like. When you're confident, submit your answer and I'll grade it like a real screen (7/10 or better passes).
How would you answer these digital logic questions: write full adder code and a testbench in Verilog, derive truth tables for JK and D flip-flops, explain why glitches occur and how to solve them, and implement a NAND gate using a mux?